The reconstructed PCM telemetry stream remains a serial wave train of 1’s and 0’s. Before converting this serial stream into words containing characters, numbers, nibbles, and individual bits, the reference point or synchronization word must first be isolated. This is the task of frame synchronization.

Heritage ground telemetry systems required a frame synchronizer, a dedicated 5.25-inch by 19-inch rack-mount chassis, to isolate minor frames. The frame sync first located the frame synchronization pattern and then passed the frame of fixed length words to a word selector, subframe selector(s), or computer for decommutation into individual words. The word selector passed a few chosen words to an annunciator or strip chart recorder for real-time quick-look.

Today, the functions of frame synchronization, subframe synchronization, and decommutation of all words occupy a single decom board (even a fraction of a board).

PCM streams are not always received with continuous complete errorless frames. Isolating the frame sync task is complicated by the presence of bit errors, slippage (undetected bit(s)), and random data sequences. Users can choose the number of valid frames before accepting data as well as the level of confidence that valid data is received by specifying the frame sync's ability to detect valid frame sync patterns. With respect to numbers of valid frames, four states or operational modes are considered in the diagram and definitions below:

• Search — The synchronizer looks for a possible sync pattern.
  
  
• Verify — A pattern is tentatively identified, a window is set at the predicted time of reoccurrence of the sync pattern, and the masked sync pattern is checked for several frames. If the pattern recurs in the sync window for a prescribed preset number of frames, the synchronizer advances to lock.
  
  
• Lock — The synchronizer continues to look for the frame sync pattern in the sync window and will only revert to a previous mode if the sync pattern fails to occur in the window for a given number of frames. Once frame synchronization is established, commutated and supercommutated measurands can be identified since the position of the data values is known relative to the frame sync pattern.
  
  
• Check — After being in lock, an expected frame sync pattern is not detected. This state is the converse of the "verify" mode.
  
  The conditions required to move between operational modes is also defined:
  
  
• Search to Lock —Number of consecutive valid frame synchronization patterns that must be detected in the data stream before the decom advances from search to lock. For example, if you enter 3, the decom will not advance from search to lock until it detects three consecutive valid frame synchronization patterns in the data stream. When it detects the first valid frame synchronization pattern, it advances from search to verify mode. It remains in verify mode when it detects the second valid frame synchronization pattern. If the third frame synchronization pattern is valid, it advances from verify to lock. Otherwise, it will return to search. A 100% match of the actual to programmed pattern may not always be attainable. Thus, decoms have several programmable options to allow advancement to the next state.
  
  
• Lock to Search —Number of consecutive invalid frame synchronization patterns that must be detected in the data stream before the decom goes into search mode. For example, if the constraint is set to 3, the decom will go into search if it detects three consecutive invalid frame synchronization patterns in the data stream. When it detects the first invalid frame synchronization pattern, it advances from lock to check mode. It remains in check mode when it detects the second invalid frame synchronization pattern. If the third frame synchronization pattern is invalid, it advances to search; otherwise, it will return to lock. If the constraint is set to 1, the decom will bypass the check mode and go right into search mode upon the identification of one invalid frame sync pattern.
  
  
• Sync Pattern Bit Errors — Calculates the number of correct bits in the synchronization pattern for a valid pattern. For example, if the synchronization pattern is 32 bits long and the Sync Pattern Bit Errors is set to 4, then the decom will look for 28 good bits in a pattern.
  
  
• Bit Aperture — Allows or disallows bit slips in the frame synchronization pattern. For example, 1 allows the frame synchronization pattern to be "early" or "late" by one bit time and still be valid for a lock state. Similar techniques can be used to detect subframe sync words. While sync words test the overall integrity of one location, a Cyclic Redundancy Check (CRC) word may be included in the frame to check the integrity of an entire frame (although this is not included in the IRIG-106 specification). The next figure shows an example of the decom status pages of L-3 Telemetry-West's Visual Test System and System 550.

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